1. Field of the Invention
This invention relates generally to microprocessors and microcontrollers. Specifically, the present invention relates to watchdog timers which may be found as auxiliary components as either physically integral or separate from the microprocessor or microcontroller. If physically separate, the watchdog timer may be a stand alone component or integrated into a device which contains the watchdog timer as one of several auxiliary functions related to the operation of the microprocessor or microcontroller.
2. Description of the Prior Art
The current state of the art describes watchdog timers which are used to prevent lock-up of the software executed by the computer system. Lock-up of the software may occur for a variety or reasons such as software defects, power surges, eletro-magnetic interference, etc. The watchdog timer serves to interrupt or reset the computer system after a predetermined time has elapsed unless commanded not to do so by the system. Thus, if the computer system is operating correctly, the watchdog time will be continuously restarted prior to the predetermined elapsed time and will not reset the microprocessor. However, if the computer system fails to operate properly, the watchdog timer will expire causing a reset to be sent to the microprocessor.
In computer systems where the microprocessor enters a sleep mode or a hibernation mode as a result of inactivity for example, the function performed by the watchdog timer may not be required. In cases such as this, an external event, such as renewed activity, will cause the microprocessor to exit the sleep mode and restart normal operation. Thus, in systems where power conservation is imperative, such as battery operated systems, turning off non-essential functions such as a watchdog timer during sleep mode will serve to conserve battery power.
In many conventional computer systems, the control or selection of the watchdog timer function is performed by a mask option during fabrication or a hardware fuse such as an Eletrically Programmble Read Only Memory (EPROM) bit. The drawback to these designs is that once enabled, the watchdog timer cannot be disabled during modes when its function is not required by the system.
U.S. Pat. No. 5,175,845 (Little) discloses an integrated circuit with watchdog timer and sleep control logic which places the integrated circuit and watchdog timer into sleep mode. However, there are several technological distinctions between the Little reference and the present invention. These differences include the incorporation of the watchdog timer on an auxiliary integrated circuit other than the microprocessor, the need to ground the xe2x80x9cINxe2x80x9d pin to permanently disable the watchdog timer (which also disables the non maskable interrupt) and disabling the watchdog timer by leaving the strobe input xe2x80x9cSTxe2x80x9d open. Thus, the Little reference lacks the flexibility of a watchdog timer, integral with the microcontroller, with firmware and software selectability.
Therefore, a need existed to provide watchdog timer which may be implemented on the same integrated circuit as the microcontroller with firmware and software selection logic.
It is an object of the present invention to provide a watchdog timer on the same integrated circuit as the microprocessor or microcontroller.
It is another object of the present invention to provide a watchdog timer which may be enabled or disabled by a fuse such as an EPROM device.
It is another object of the present invention to provide a watchdog timer which may be enabled or disabled by software control over a register.
It is another object of the present invention to provide a master control for the enablement or disablement of the watchdog timer.
In accordance with one embodiment of the present invention, a watchdog timer control circuit is comprised of a permanent enablement logic, software controllable logic, selection logic and a watchdog timer.
The foregoing and other objects, features, and advantages of the invention will be apparent from the following, more particular, description of the preferred embodiment of the invention, as illustrated in the accompanying drawings.